Analysis and Design of Networks-on-Chip Under High Process Variation
This book describes in detail the impact of process variations on Network-on-Chip (NoC) performance. The authors evaluate various NoC topologies under high process variation and explain the design of efficient NoCs, with advanced technologies. The discussion includes variation in logic and interconn...
| Published in: | Springer eBooks |
|---|---|
| Main Authors: | , , |
| Corporate Author: | |
| Format: | eBook |
| Language: | English |
| Published: |
Cham :
Springer International Publishing : Imprint: Springer,
2015.
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| Edition: | 1st ed. 2015. |
| Subjects: | |
| Online Access: | http://dx.doi.org/10.1007/978-3-319-25766-2 Перейти в каталог НБ ТГУ |
Table of Contents:
- Introduction
- Network On Chip Aspects
- Interconnection
- Process Variation
- Synchronous And Asynchronous NoC Design Under High Process Variation
- Novel Routing Algorithm
- Simulation Results
- Conclusions.