Masking circuit faults and Trojan circuit injections using sat solvers
Combinational circuit C composed of gates and its sub-circuit with set V of output nodes and set U of input nodes are considered. The set V consists of output nodes of fault gates of the circuit C (only logical faults are examined) and fault free gates, the inputs of which are at the same time lines...
| Published in: | Russian physics journal Vol. 63, № 12. P. 2178-2188 |
|---|---|
| Other Authors: | , , , , |
| Format: | Article |
| Language: | English |
| Subjects: | |
| Online Access: | http://vital.lib.tsu.ru/vital/access/manager/Repository/koha:000897140 Перейти в каталог НБ ТГУ |