A Pipelined Multi-core MIPS Machine Hardware Implementation and Correctness Proof /

A Pipelined Multi-core MIPS Machine Hardware Implementation and Correctness Proof /

This monograph is based on the third author's lectures on computer architecture, given in the summer semester 2013 at Saarland University, Germany. It contains a gate level construction of a multi-core machine with pipelined MIPS processor cores and a sequentially consistent shared memory. The...

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Bibliographic Details
Published in:Springer eBooks
Main Authors: Kovalev, Mikhail (Author), Müller, Silvia M. (Author), Paul, Wolfgang J. (Author)
Corporate Author: SpringerLink (Online service)
Format: eBook
Language:English
Published: Cham : Springer International Publishing : Imprint: Springer, 2014.
Series:Lecture Notes in Computer Science,
Subjects:
Computer Science.
Computer hardware.
Computer Communication Networks.
Software engineering.
Computer software.
Algorithm Analysis and Problem Complexity.
Software Engineering.
Computer Hardware.
Processor Architectures.
Programming Languages, Compilers, Interpreters.
Online Access:http://dx.doi.org/10.1007/978-3-319-13906-7
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http://dx.doi.org/10.1007/978-3-319-13906-7
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